Program > By author > Rezvan Sadeghi

Managing Capacity Production with Time Constraints in Semiconductor Manufacturing
Sadeghi Rezvan  1@  , Stéphane Dauzere-Peres  1@  , Claude Yugma  1@  , Rochdi Sarraj  1@  
1 : Ecole Nationale Supérieure des Mines de Saint-Etienne, Centre Microélectronique de Provence  (EMSE-CMP)  -  Website
Ministère du Redressement productif
CMP - Site Georges Charpak 880, route de Mimet F-13541 Gardanne - France -  France

The semiconductor manufacturing is arguably the most complex manufacturing process due to constrained production processes, reentrant flows, expensive sophisticated equipment, ... and complex time constraints between operations [Monch 2012]. The problem we address here is managing capacity production by respecting these complex time constraints in semiconductor fabrication plant.

Our work is about a specific area of semiconductor fab. An area is represented by a sequence of process steps which are linked by complex time constraints. A time constraint covers a sequence of process steps and represents a maximum time that a product should complete processing on them. Products with a violation of the recommended time constraint have to be scrapped. The capacity of the area is maximum number of products that can be processed by respecting time constraints. To adapt the capacity problem in our fab, two specific points must be taken into account: firstly, the fact that time constraints covers multiple process steps. Secondly, the overlapping among time constraints. In the fab, overlapping among two time constraints occurs when they have some common process steps. To compute capacity of the area, we propose a static approach based on priority of time constraints and critical process steps.

There are some papers that address time constraints between process steps for managing capacity [Giglio 1999, Hertzler 2006]. However, overlapping between time constraints has not been discussed, and our contribution is to develop this point.

 

Reference

 

[Monch 2012] L.Monch, J.W. Fowler and S.J. Mason (2012). Production Planning and

Control for Semiconductor Wafer Fabrication Facilities, Springer.

 

[Giglio 1999] J.K. Robinson, R.Giglio (1999).Capacity planning for semiconductor wafer

fabrication with time constraints between operations.Winter Simulation Conference

Proceedings, vol.1, 880 - 887.

 

[Hertzler 2006] D.L.van Sickle, E.F.Hertzler (2006).300mm Time Constrained Queue Loop

Management.Semiconductor Manufacturing, ISSM 2006. IEEE International Symposium on semiconductor manufacturing . Tokyo, 57 – 60.


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